Motion Compensation Hardware Accelerator Architecture for H.264/AVC.

dc.contributor.author	Zatt, Bruno	pt_BR
dc.contributor.author	Ferreira, Valter Antônio	pt_BR
dc.contributor.author	Agostini, Luciano Volcan	pt_BR
dc.contributor.author	Wagner, Flavio Rech	pt_BR
dc.contributor.author	Susin, Altamiro Amadeu	pt_BR
dc.contributor.author	Bampi, Sergio	pt_BR
dc.date.accessioned	2011-07-21T06:00:18Z	pt_BR
dc.date.issued	2007	pt_BR
dc.identifier.uri	http://hdl.handle.net/10183/30272	pt_BR
dc.format.mimetype	application/pdf	pt_BR
dc.language.iso	eng	pt_BR
dc.relation.ispartof	Second Pacific Rim Symposium. PSIVT 2007. (2007 dez. : Santiago, Chile). Proceedings. Santiago, Chile. 2007. Advances in Image Video Technology. Berlin : Springer Berlin/Heidelberg, 2007.	pt_BR
dc.rights	Open Access	en
dc.subject	Sistemas digitais	pt_BR
dc.subject	Fpga	pt_BR
dc.subject	Televisão digital	pt_BR
dc.subject	Codificacao : Video digital	pt_BR
dc.title	Motion Compensation Hardware Accelerator Architecture for H.264/AVC.	pt_BR
dc.type	Trabalho completo publicado em evento	pt_BR
dc.identifier.nrb	000637330	pt_BR
dc.type.origin	Estrangeiro	pt_BR

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