Now showing items 1-7 of 7

    • Desenvolvimento de técnicas de tolerância à falhas para componentes programáveis por SRAM 

      Kastensmidt, Fernanda Gusmão de Lima; Neuberger, Gustavo; Carro, Luigi; Reis, Ricardo Augusto da Luz (2005) [Journal article]
      Este artigo discute técnicas de tolerância à falhas para componentes programáveis, conhecidos por FPGAs (Field Programmable Cate Arrays). Essas técnicas baseiam-se em modificações a nível de circuito lógico implementadas ...
    • Designing fault-tolerant techniques for SRAM-Based FPGAs 

      Kastensmidt, Fernanda Gusmão de Lima; Neuberger, Gustavo; Hentschke, Renato Fernandes; Carro, Luigi; Reis, Ricardo Augusto da Luz (2004) [Journal article]
    • A high-fault-coverage approach for the test of data, control, and handshake interconnects in mesh networks-on-chip 

      Cota, Erika Fernandes; Kastensmidt, Fernanda Gusmão de Lima; Santos, Maico Cassel dos; Hervé, Marcos Barcellos; Almeida, Pedro Rogério Vieira de; Meirelles, Paulo Roberto Miranda; Amory, Alexandre de Morais; Lubaszewski, Marcelo Soares (2008) [Journal article]
      A novel strategy for detecting interconnect faults between distinct channels in networks-on-chip is proposed. Short faults between distinct channels in the data, control, and communication handshake wires are considered ...
    • A self-checking scheme to mitigate single event upset effects in SRAM-based FPAAs 

      Balen, Tiago Roberto; Leite, Franco Ripoll; Kastensmidt, Fernanda Gusmão de Lima; Lubaszewski, Marcelo Soares (2009) [Journal article]
      In this work the problem of Single Event Upset (SEU) is considered in a recent analog technology: The Field Programmable Analog Arrays (FPAAs). Some FPAA models are based on SRAM memory cells to implement the user ...
    • Single event transients in logic circuits - load and propagation induced pulse broadening 

      Wirth, Gilson Inacio; Kastensmidt, Fernanda Gusmão de Lima; Ribeiro, Ivandro da Silva (2008) [Journal article]
      The generation and propagation of single event transients (SET) in logic gate chains is studied and modeled. Regarding SET generation, we investigate the dependence of the generated SET pulse width on the struck node ...
    • Tbulk-BICS : a Built-in current sensor robust to process and temperature variations for soft error detection 

      Henes Neto, Egas; Kastensmidt, Fernanda Gusmão de Lima; Wirth, Gilson Inacio (2008) [Journal article]
      This paper presents a parameterized current sensor able to detect transient ionization in the silicon substrate. Each sensor is controlled by a set of trimming bits that can be used to attune the sensitivity of the sensor ...
    • Testing a fault tolerant mixed-signal design under TID and heavy ions 

      González Aguilera, Carlos Julio; Machado, Diego do Nascimento; Vaz, Rafael Galhardo; Vilas Bôas, Alexis Cristiano; Gonçalez, Odair Lelis; Puchner, Helmut K.; Added, Nemitala; Macchione, Eduardo; Aguiar, Vitor Ângelo Paulino de; Kastensmidt, Fernanda Gusmão de Lima; Medina, Nilberto Hedar; Guazzelli, Marcilei Aparecida; Balen, Tiago Roberto (2021) [Journal article]
      This work presents results of three distinctradiation tests performed upon a fault tolerant data acqui-sition system comprising a design diversity redundancytechnique. The first and second experiments are Total Ion-izing ...