• Automatic generation and evaluation of transistor networks in different logic styles 

      Rosa Junior, Leomar Soares da (2008) [Tese]
      O projeto e o desenvolvimento de circuitos integrados é um dos mais importantes e aquecidos segmentos da indústria eletrônica da atualidade. Neste cenário, ferramentas de automação têm possibilitado aos projetistas manipular ...
    • Graph-based algorithms for transistor count minimization in VLSI circuit EDA tools 

      Matos, Jody Maick Araujo de (2014) [Dissertação]
      This master’s thesis introduces a set of graph-based algorithms for obtaining reduced transistor count VLSI circuits using simple cells. These algorithms are mainly focused on minimizing node count in AIG representations ...
    • KL-cut based remapping 

      Machado, Lucas (2013) [Dissertação]
      This work introduces the concept of k-cuts and kl-cuts on top of a mapped circuit in a netlist representation. Such new approach is derived from the concept of k-cuts and klcuts on top of AIGs (and inverter graphs), ...